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2 a/3 a, 20 v, 700 khz, nonsynchronous step-down regulators data sheet adp2302/ adp2303 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010C2012 analog devices, inc. all rights reserved. features wide input voltage range: 3.0 v to 20 v maximum load current 2 a for adp2302 3 a for adp2303 1.5% output accuracy over temperature output voltage down to 0.8 v 700 khz switching frequency current-mode control architecture automatic pfm/pwm mode precision enable pin with hysteresis integrated high-side mosfet integrated bootstrap diode internal compensation and soft start power-good output undervoltage lockout (uvlo) overcurrent protection (ocp) thermal shutdown (tsd) 8-lead soic package with exposed paddle supported by adisimpower ? design tool applications intermediate power rail conversion dc-to-dc point of load applications communications and networking industrial and instrumentation healthcare and medical consumer typical applications circuit vin v in v out adp2302/ adp2303 pgood en gnd off on bst sw fb 08833-001 figure 1. typical application circuit 40 50 60 70 80 90 100 0 0.5 1.0 1.5 2.0 2.5 3.0 efficiency (%) output current (a) inductor: vlf10040t - 4r7n5r4 diode: ssb43l v out = 3.3v v out = 5.0v 08833-002 figure 2. adp2303 efficiency vs. output current at v in = 12 v general description the adp2302/adp2303 are fixed frequency, current-mode control, step-down, dc-to-dc regulators with an integrated power mosfet. the adp2302/adp2303 can run from an input voltage of 3.0 v to 20 v, which makes them suitable for a wide range of applications. the output voltage of the adp2302/ adp2303 can be down to 0.8 v for the adjustable version, while the fixed output version is available in preset output voltage options of 5.0 v, 3.3 v, and 2.5 v. the 700 khz operating frequency allows small inductor and ceramic capacitors to be used, providing a compact solution. current mode control provides fast and stable line and load transient performance. the adp2302/adp2303 have integrated soft start circuitry to prevent a large inrush current at power-up. the power-good signal can be used to sequence devices that have an enable input. the precision enable threshold voltage allows the part to be easily sequenced from other input/output supplies. other key features include undervoltage lockout (uvlo), overvoltage protection (ovp), thermal shutdown (tsd), and overcurrent protection (ocp). the adp2302/adp2303 devices are available in the 8-lead, soic package with exposed paddle and are rated for the ?40 o c to +125 o c junction temperature range.
adp2302/adp2303 data sheet rev. a | page 2 of 28 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? typical applications circuit ............................................................ 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 4 ? thermal resistance ...................................................................... 4 ? esd caution .................................................................................. 4 ? pin configuration and function descriptions ............................. 5 ? typical performance characteristics ............................................. 6 ? functional block diagram ............................................................ 13 ? theory of operation ...................................................................... 14 ? basic operation .......................................................................... 14 ? pwm mode ................................................................................. 14 ? power saving mode .................................................................... 14 ? bootstrap circuitry .................................................................... 14 ? precision enable ......................................................................... 14 ? integrated soft start ................................................................... 14 ? current limit .............................................................................. 14 ? short-circuit protection ............................................................ 14 ? undervoltage lockout (uvlo) ............................................... 15 ? thermal shutdown (tsd) ......................................................... 15 ? overvoltage protection (ovp) ................................................. 15 ? power good ................................................................................ 15 ? control loop ............................................................................... 15 ? applications information .............................................................. 16 ? adisimpower design tool ....................................................... 16 ? programming output voltage .................................................. 16 ? voltage conversion limitations ............................................... 16 ? low input voltage considerations .......................................... 17 ? programming the precision enable ......................................... 17 ? inductor ....................................................................................... 17 ? catch diode ................................................................................ 18 ? input capacitor ........................................................................... 19 ? output capacitor........................................................................ 19 ? thermal consideration ............................................................. 19 ? design example .............................................................................. 20 ? catch diode selection ............................................................... 20 ? inductor selection ...................................................................... 20 ? output capacitor selection....................................................... 20 ? resistive voltage divider selection .......................................... 20 ? circuit board layout recommendations ................................... 22 ? typical application circuits ......................................................... 23 ? outline dimensions ....................................................................... 26 ? ordering guide .......................................................................... 26 ? revision history 6/12rev. 0 to rev. a change to features section ............................................................. 1 added adisimpower design tool section ................................. 16 change to voltage conversion limitations section .................. 16 updated outline dimensions ....................................................... 26 changes to ordering guide .......................................................... 26 7/10revision 0: initial version
data sheet adp2302/adp2303 rev. a | page 3 of 28 specifications v in = 3.3 v, t j = ?40c to +125c for minimum/maximum specifications, and t a = 25c for typical specifications, unless otherwise noted. table 1. parameters symbol test conditions min typ max unit vin voltage range v in 3.0 20 v supply current i vin no switching, v in = 12 v 720 950 a shutdown current i shdn v en = 0 v, v in = 12 v 24 45 a undervoltage lockout threshold uvlo v in rising 2.7 2.9 v v in falling 2.2 2.4 v fb regulation voltage v fb adp230xardz (adjustable) 0.788 0.8 0.812 v adp230xardz-2.5 2.463 2.5 2.538 v adp230xardz-3.3 3.25 3.3 3.35 v adp230xardz-5.0 4.925 5.0 5.075 v bias current i fb adp230xardz (adjustable) 0.01 0.1 a sw on resistance 1 v bst ? v sw = 5 v, i sw = 200 ma 80 120 160 m peak current limit adp2302, v bst ? v sw = 5 v 2.7 3.5 4.4 a adp2303, v bst ? v sw = 5 v 4.6 5.5 6.4 a leakage current v en = v sw = 0 v, v in = 12 v 0.1 5 a minimum on time 126 170 ns minimum off time 210 280 ns oscillator frequency f sw 595 700 805 khz soft start time 2048 clock cycles en input threshold v en 1.12 1.2 1.28 v input hysteresis 100 mv pull-down current 1.2 a bootstrap voltage v boot v in = 12 v 4.7 5.0 5.3 v pgood pgood rising threshold 82.5 87.5 92.5 % pgood hysteresis 2.5 % pgood deglitch time 2 32 clock cycles pgood output low voltage 150 300 mv pgood leakage current v pgood = 5 v 0.1 1 a thermal shutdown threshold rising temperature 150 c hysteresis 15 c 1 pin-to-pin measurements. 2 guaranteed by design.
adp2302/adp2303 data sheet rev. a | page 4 of 28 absolute maximum ratings table 2. parameter max rating vin, en, pgood ?0.3 v to +24 v sw ?1.0 v to +24 v bst to sw ?0.6 v to +6 v fb, nc ?0.3 v to +6 v operating junction temperature range ?40c to +125c storage temperature range ?65c to +150c soldering conditions jedec j-std-020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. unless otherwise specified, all voltages are referenced to gnd. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance 1 package type ja unit 8-lead soic_n_ep 58.5 c/w 1 ? ja is measured using na tural convection on jedec 4-layer board. esd caution
data sheet adp2302/adp2303 rev. a | page 5 of 28 pin configuration and fu nction descriptions bst 1 vin 2 en 3 pgood 4 sw 8 gnd 7 nc 6 fb 5 notes 1. nc = no connect. 2. the exposed pad should be soldered to an external ground plane underneath the ic for thermal dissipation. adp2302 adp2303 top view (not to scale) 08833-003 figure 3. pin configuration (top view) table 4. pin function descriptions pin o. nemonic description 1 bst bootstrap supply for the high-side mosfet driver. a 0. 1 f capacitor is connected between sw and bst to provide a floating driver voltage for the power switch. 2 vin power input. connect to the input power source with a ceramic bypass capacitor to gnd directly from this pin. 3 en output enable. pull this pin high to enable the output. pull this pin low to disable the output. this pin can also be used as a programmable uvlo input. this pi n has an internal 1.2 a pull-down current to gnd. 4 pgood power-good open-drain output. 5 fb feedback voltage sense input. for the adjustable version, connect this pin to a resistive divider from v out . for the fixed output version, connect this pin to v out directly. 6 nc used for internal testing. connect to gnd or leave this pin floating to ensure proper operation. 7 gnd ground. connect this pin to the ground plane. 8 sw switch node output. connect an inductor to v out and a catch diode to gnd from this pin. 9 (epad) exposed pad the exposed pad should be soldered to an external ground plane underneath the ic for thermal dissipation.
adp2302/adp2303 data sheet rev. a | page 6 of 28 typical performance characteristics v in = 3.3 v, t a = 25c, unless otherwise noted. 40 50 60 70 80 90 100 0 0.5 1.0 1.5 2.0 2.5 3.0 efficiency (%) output current (a) v out = 2.5v v out = 3.3v v out = 5.0v inductor: vlf10040t-6r8n4r5 diode: ssb43l 08833-004 figure 4. adp2303 efficiency, v in = 18 v 40 50 60 70 80 90 100 0 0.5 1.0 1.5 2.0 2.5 3.0 efficiency (%) output current (a) v out = 1.8v v out = 1.5v v out = 1.2v v out = 2.5v inductor: vlf10040t-2r2n7r1 diode: ssb43l 08833-005 figure 5. adp2303 efficiency, v in = 5 v 40 50 60 70 80 90 100 00 . 51 . 01 . 5 2.0 efficiency (%) output current (a) inductor: vlf10040t-6r8n4r5 diode: ssb43l v out = 2.5v v out = 1.8v v out = 1.5v v out = 3.3v v out = 5.0v 0 8833-006 figure 6. adp2302 efficiency, v in = 12 v 0 0.5 1.0 1.5 2.0 2.5 3.0 40 50 60 70 80 90 100 efficiency (%) output current (a) inductor: vlf10040t-4r7n5r4 diode: ssb43l 08833-007 v out = 2.5v v out = 1.8v v out = 1.5v v out = 3.3v v out = 5.0v figure 7. adp2303 efficiency, v in = 12 v 40 50 60 70 80 90 100 0 0.5 1.0 1.5 2.0 efficiency (%) output current (a) v out = 2.5v v out = 3.3v v out = 5.0v inductor: vlf10040t-6r8n4r5 diode: ssb43l 08833-008 figure 8. adp2302 efficiency, v in = 18 v 40 50 60 70 80 90 100 0 0.5 1.0 1.5 2.0 efficiency (%) output current (a) inductor: vlf10040t-3r3n6r2 diode: ssb43l v out = 1.8v v out = 1.5v v out = 1.2v v out = 2.5v 08833-009 figure 9. adp2302 efficiency, v in = 5 v
data sheet adp2302/adp2303 rev. a | page 7 of 28 ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 5 8 11 14 17 20 line regul a tion (%) v in (v) 08833-010 figure 10. adp2302 line regulation, v out = 3.3 v, i out = 2 a ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 5 8 11 14 17 20 line regul a tion (%) v in (v) 08833-011 figure 11. adp2303 line regulation, v out = 3.3 v , i out = 3 a 0 5 10 15 20 25 30 35 40 45 50 2468101214161820 shutdown current ( a) v in (v) t j = ?40c t j = +25c t j = +125c 08833-012 figure 12. shutdown current vs. v in ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 0 0.5 1.0 1.5 2.0 load regul a tion (%) output current (a) 08833-013 figure 13. adp2302 load regulation, v out = 3.3v, v in = 12 v ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 0 0.5 1.0 1.5 2.0 2.5 3.0 load regul a tion (%) output current (a) 08833-014 figure 14. adp2303 load regulation, v out = 3.3 v, v in = 12 v 500 550 600 650 700 750 800 850 900 2 4 6 8 10 12 14 16 18 20 quiescent current ( a) v in (v) t j = ?40c t j = +25c t j = +125c 08833-015 figure 15. quiescent current vs. v in
adp2302/adp2303 data sheet rev. a | page 8 of 28 590 610 630 650 670 690 710 730 750 770 790 810 ?40 ?20 0 20 40 60 80 100 120 frequency (khz) temperature (c) 08833-016 figure 16. frequency vs. temperature 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 ?40?20 0 20406080100120 peak current limit (a) temperature (c) 08833-017 figure 17. adp2302 current-limit threshold vs. temperature, v bst ? v sw = 5 v 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 uvlo threshold (v) temperature (c) ?40?20 0 20406080100120 rising falling 08833-018 figure 18. uvlo threshold vs. temperature 788 790 792 794 796 798 800 802 804 806 808 810 812 feedback voltage (mv) temperature (c) ?40?20 0 20406080100120 08833-019 figure 19. 0.8 v feedback voltage vs. temperature 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 peak current limit (a) ?40 ?20 0 20 40 60 80 100 120 temperature (c) 08833-020 figure 20. adp2303 current-limit threshold vs. temperature, v bst ? v sw = 5 v 1.05 1.00 1.10 1.15 1.20 1.25 1.30 enable threshold (v) temperature (c) ?40?20 0 20406080100120 rising falling 08833-021 figure 21. enable threshold vs. temperature
data sheet adp2302/adp2303 rev. a | page 9 of 28 205 210 215 220 225 230 235 240 245 250 255 260 265 270 minimum off time (ns) temperature (c) ?40 ?20 0 20 40 60 80 100 120 08833-022 figure 22. minimum off time vs. temperature 60 70 80 90 100 110 120 130 140 150 160 170 180 mosfet resistor (m ? ) v gs = 3v v gs = 4v v gs = 5v temperature (c) ?40 ?20 0 20 40 60 80 100 120 08833-023 figure 23. mosfet r dson vs. temperature (pin-to-pin measurement) ch1 5.00mv b w ch2 5.00v m1.00s a ch2 7.50v 1 4 2 t 30.00% v out (ac) i l sw ch4 2.00a ? 08833-024 figure 24. discontinuous conduction mode (dcm), v out = 3.3 v, v in = 12 v 100 105 110 115 120 125 130 135 140 145 150 minimum on time (ns) temperature (c) ?40?20 0 20406080100120 08833-025 figure 25. minimum on time vs. temperature ch1 5.00mv b w ch2 5.00v ch4 2.00a ? m1.00s a ch2 7.50v 1 4 2 t 30.00% v out (ac) i l sw 08833-026 figure 26. continuous conduction mode (ccm), v out = 3.3 v, v in = 12 v ch1 50.00mv b w ch2 5.00v ch4 2.00a ? m200s a ch2 7.50v 1 4 2 t 30.00% v out (ac) i l sw 0 8833-027 figure 27. power saving mode, v out = 3.3 v, v in = 12 v
adp2302/adp2303 data sheet rev. a | page 10 of 28 ch1 2.00v b w ch2 10.0v m1.00ms a ch3 6.20v 1 4 2 3 t 20.20% v out i l en sw ch3 10.0v b w ch4 2.00a ? 08833-028 figure 28. soft start without load, v out = 3.3 v, v in = 12 v ch1 500mv b w m200s a ch4 1.20a 1 4 t 20.00% v out (ac) i o ch4 2.00a ? 08833-029 figure 29. adp2303 load transient, 0.5 a to 3.0 a, v out = 5.0 v, v in = 12 v, l = 4.7 h, c out = 47 f ch1 200mv b w m200s a ch4 1.20a 1 4 t 20.00% v out (ac) i o ch4 1.00a ? 0 8833-030 figure 30. adp2302 load transient, 0.5 a to 2.0 a, v out = 5.0 v, v in = 12 v, l = 6.8 h, c out = 2 22 f ch1 2.00v b w ch2 10.0v m1.00ms a ch3 3.60v 1 4 2 3 t 20.20% v out en sw ch3 10.0v b w ch4 2.00a ? i l 08833-031 figure 31. soft start with full load, v out = 3.3 v, v in = 12 v ch1 200mv b w m200s a ch4 1.88a 1 4 t 20.00% v out (ac) i o ch4 2.00a ? 0 8833-032 figure 32. adp2303 load transient, 0.5 a to 3.0 a, v out = 3.3 v, v in = 12 v, l = 4.7 h, c out = 2 47 f ch1 200mv b w m200s a ch4 1.20a 1 4 t 20.00% v out (ac) i o ch4 1.00a ? 0 8833-033 figure 33. adp2302 load transient, 0.5 a to 2.0 a, v out = 3.3 v, v in = 12 v, l = 6.8 h, c out = 2 22 f
data sheet adp2302/adp2303 rev. a | page 11 of 28 ch1 1.00mv b w ch2 10.0v m40.0s a ch1 1.26v 1 4 2 t 30.00% v out i l sw ch4 5.00a ? 08833-034 figure 34. output short, v out = 3.3 v, v in = 12 v, l = 4.7 h, c out = 2 47 f ch1 20.0mv b w ch2 10.0v b w m1.00ms a ch3 11.0v 1 3 2 t 23.40% v out v in sw ch3 5.00v b w 08833-035 figure 35. adp2303 line transient, 7 v to 15 v, v out = 3.3 v, i out = 3 a, l = 4.7 h, c out = 2 47 f 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m magnitude (db) phase (degrees) cross frequency = 36khz phase margin = 60 frequency (hz) 0 8833-036 figure 36. adp2302 bode plot, v out = 2.5 v, v in = 12 v, l = 4.7 h, c out =3 22 f ch1 1.00v b w ch2 10.0v m400s a ch1 1.26v 1 4 2 t 30.00% v out i l ch4 5.00a ? sw 08833-037 figure 37. output short recovery, v out = 3.3 v, v in = 12 v, l = 4.7 h, c out = 2 47 f ch1 20.0mv b w ch2 10.0v b w m1.00ms a ch3 11.0v 1 3 2 t 23.40% v out v in sw ch3 5.00v b w 08833-038 figure 38. adp2302 line transient, 7 v to 15 v, v out = 3.3 v, i out = 2 a, l = 6.8 h, c out = 2 22 f 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m cross frequency = 42khz phase margin = 56 frequency (hz) 0 8833-039 magnitude (db) phase (degrees) figure 39. adp2302 bode plot, v out = 3.3 v, v in = 12 v, l = 6.8 h, c out = 2 22 f
adp2302/adp2303 data sheet rev. a | page 12 of 28 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m cross frequency = 32khz phase margin = 59 frequency (hz) 0 8833-040 magnitude (db) phase (degrees) figure 40. adp2302 bode plot, v out = 5 v, v in = 12 v, l = 6.8 h, c out = 2 22 f 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m cross frequency = 19khz phase margin = 59 frequency (hz) 0 8833-041 magnitude (db) phase (degrees) figure 41. adp2303 bode plot, v out = 3.3 v, v in = 12 v, l = 4.7 h, c out = 2 47 f 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m magnitude (b/a) (db) phase (b?a) (degeres) frequency (hz) cross frequency = 26khz phase margin = 65 08833-142 figure 42. adp2303 bode plot, v out = 2.5 v, v in = 12 v, l = 3.3 h, c out = 2 47 f 1k 10k 80 64 48 32 16 0 ?16 ?32 ?48 ?64 ?80 180 144 108 72 36 0 ?36 ?72 ?108 ?144 ?180 100k 1m magnitude (b/a) (db) phase (b?a) (degeres) frequency (hz) cross frequency = 28khz phase margin = 65 08833-143 figure 43. adp2303 bode plot, v out = 5 v, v in = 12 v, l = 4.7 h, c out = 47 f
data sheet adp2302/adp2303 rev. a | page 13 of 28 functional block diagram 1 8 2 3 6 7 gnd v in vin ocp current limit threshold current sense amplifier ovp thermal shutdown shutdown logic uvlo boot regulator clk generator frequency foldback ( ? f sw , ? f sw , ? f sw , f sw ) r s q ramp generator shutdown ic 0.880v 0.680v 1.20v 1.2a 0.8v voltage reference on en 4 pgood off v bias = 1.1v g m bst fb sw v out adp2302/adp2303 nc 5 08833-042 figure 44. functional block diagram
adp2302/adp2303 data sheet rev. a | page 14 of 28 theory of operation the adp2302/adp2303 are nonsynchronous, step-down, dc-to-dc regulators, each with an integrated high-side power mosfet. the high switching frequency and 8-lead soic package provide a small, step-down, dc-to-dc regulator solution. the adp2302/adp2303 can operate with an input voltage from 3.0 v to 20 v while regulating an output voltage down to 0.8 v. the adp2302 can provide 2 a maximum continuous output current, and the adp2303 can provide 3 a maximum continuous output current. basic operation the adp2302/adp2303 use the fixed-frequency, peak current- mode pwm control architecture from medium to high loads, but shift to a pulse-skip mode control scheme at light loads to reduce the switching power losses and improve efficiency. when these devices operate in fixed-frequency pwm mode, output regulation is achieved by controlling the duty cycle of the integrated mosfet. while the devices are operating in pulse-skip mode at light loads, the output voltage is controlled in a hysteretic manner with higher output ripple. in this mode of operation, the regulator periodically stops switching for a few cycles, thus keeping the conversion losses minimal to improve efficiency. pwm mode in pwm mode, the adp2302/adp2303 operate at a fixed frequency, set by an internal oscillator. at the start of each oscillator cycle, the mosfet switch is turned on, providing a positive voltage across the inductor. the inductor current increases until the current-sense signal crosses the peak inductor current threshold that turns off the mosfet switch; this threshold is set by the error amplifier output. during the mosfet off time, the inductor current declines through the external diode until the next oscillator clock pulse comes and a new cycle starts. power saving mode to achieve higher efficiency, the adp2302/adp2303 smoothly transition to the pulse-skip mode when the output load decreases below the pulse-skip current threshold. when the output vol- tage dips below the regulation, the adp2302/adp2303 enter pwm mode for a few oscillator cycles until the voltage increases to regulation range. during the idle time between bursts, the mosfet switch is turned off, and the output capacitor supplies all the output current. because the pulse-skip mode comparator monitors the internal compensation node, which represents the peak inductor current information, the average pulse-skip load current threshold depends on the input voltage (v in ), the output voltage (v out ), the inductor, and the output capacitor. because the output voltage occasionally dips below regulation and then recovers, the output voltage ripple in the power saving mode is larger than the ripple in the pwm mode of operation. bootstrap circuitry the adp2302/adp2303 each have an integrated boot regulator, which requires that a 0.1 f ceramic capacitor (x5r or x7r) be placed between the bst and sw pins to provide the gate drive voltage for the high-side mosfet. there is at least a 1.2 v difference between the bst and sw pins to turn on the high-side mosfet. this voltage should not exceed 5.5 v in case the bst pin is supplied with the external voltage source through a diode. the adp2302/adp2303 generate a typical 5.0 v bootstrap voltage for the gate drive circuit by differentially sensing and regulating the voltage between the bst and sw pins. there is a diode integrated on the chip that blocks the reverse voltage between the vin and bst pins when the mosfet switch is turned on. precision enable the adp2302/adp2303 provide a precision enable circuit that has 1.2 v reference threshold with 100 mv hysteresis. when the voltage at the en pin is greater than 1.2 v (typical), the part is enabled. if the en voltage falls below 1.1 v (typical), the chip is disabled. the precision enable threshold voltage allows the adp2302/adp 2303 to be easily sequenced from other input/ output supplies. it also can be used as a programmable uvlo input by using a resistive divider. an internal 1.2 a pull-down current prevents errors if the en pin is left floating. integrated soft start the adp2302/adp2303 have an internal digital soft start circuitry to limit the output voltage rise time and reduce the inrush current at power up. the soft start time is fixed at 2048 clock cycles. current limit the adp2302/adp2303 include current-limit protection circuitry to limit the amount of positive current flowing through the high- side mosfet switch. the positive current limit on the power switch limits the amount of current that can flow from the input to the output. short-circuit protection the adp2302/adp2303 include frequency foldback to prevent output current runaway when there is a hard short on the output. the switching frequency is reduced when the voltage at the fb pin drops below a certain value, which allows more time for the inductor current to decline, but increases the ripple current while regulating the peak current. this results in a reduction in average output current and prevents output current runaway. the corre- lation between the switching frequency and the fb pin voltage is shown in table 5.
data sheet adp2302/adp2303 rev. a | page 15 of 28 table 5. correlation between f sw and v fb fb pin voltage switching frequency v fb 0.6 v f sw 0.4 v < v fb < 0.6 v 1/2 f sw 0.2 v < v fb 0.4 v 1/4 f sw v fb 0.2 v 1/8 f sw when a hard short (v fb 0.2 v) is removed, a soft start cycle is initiated to regulate the output back to its level during normal operation, which helps to limit the inrush current and prevent possible overshoot on the output voltage. undervoltage lockout (uvlo) the adp2302/adp2303 have fixed, internally set undervoltage lockout circuitry (uvlo). if the input voltage drops below 2.4 v, the adp2302/adp2303 shut down and the mosfet switch turns off. after the voltage rises above 2.7 v, the soft start period is initiated, and the part is enabled. thermal shutdown (tsd) if the adp2302/adp2303 junction temperature rises above 150 ? c, the thermal shutdown circuit disables the chip. extreme junction temperature can be the result of high current operation, poor circuit board design, or high ambient temperature. a 15 ? c hysteresis is included so that when thermal shutdown occurs, the adp2302/adp2303 do not return to operation until the on- chip temperature drops below 135 ? c. when the devices recover from thermal shutdown, a soft start is initiated. overvoltage protection (ovp) the adp2302/adp2303 provide an overvoltage protection feature to protect the system against an output short to a higher voltage supply. if the feedback voltage is above 0.880 v, the internal high-side mosfet is turned off, until the voltage at fb decreases to 0.850 v. at that time, the adp2302/adp2303 resume normal operation. power good the pgood pin is an active high, open-drain output and requires a resistor to pull it up to a voltage (<20.0 v). a high indicates that the voltage on the fb pin (and therefore the output voltage) is above 87.5% of the reference voltage. a low indicates that the voltage on the fb pin is below 85% of the reference voltage. there is a 32-cycle waiting period after fb is detected as being in or out of bounds. control loop the adp2302/adp2303 are internally compensated to minimize external component count and cost. in addition, the built-in slope compensation helps to prevent subharmonic oscillations when the adp2302/adp2303 operate at a duty cycle greater than or close to 50%.
adp2302/adp2303 data sheet rev. a | page 16 of 28 applications information adisimpower design tool the adp2302/adp2303 are supported by the adisimpower design tool set. adisimpower is a collection of tools that produce complete power designs optimized for a specific design goal. the tools enable the user to generate a full schematic and bill of materials, and calculate performance in minutes. adisimpower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the ic and all real external components. for more information about adisimpower design tools, refer to www.analog.com/adisimpower . the tool set is available from this website, and users can request an unpopulated board through the tool. programming output voltage adp2302/adp2303 have an adjustable version where the output voltage is programmed through an external resistive divider, as shown in figure 45. suggested resistor values for the typical output voltage setting are listed in table 6. the output voltages are calculated using the following equation: ? ? ? ? ? ? ? ? ??? bot top out r r v 1v800.0 where: v out is the output voltage. r top is the feedback resistor from v out to fb. r bot is the feedback resistor from fb to gnd. v out r top r bot adp2302/ adp2303 fb 08833-043 figure 45. programming the output voltage using a resistive voltage divider table 6. suggested values fo r resistive voltage divider v out (v) r top (k), 1% r bot (k), 1% 1.2 10 20 1.5 10 11.3 1.8 12.7 10.2 2.5 21.5 10.2 3.3 31.6 10.2 5.0 52.3 10 voltage conversion limitations there are both lower and upper output voltage limitations for a given input voltage due to the minimum on time, the minimum off time, and the bootstrap dropout voltage. the lower limit of the output voltage is constrained by the controllable minimum on time, which can be as high as 170 ns for the worst case. by considering the variation of both the switch- ing frequency and the input voltage, the equation for the lower limit of the output voltage is v out(min) = t min-on f sw(max) ( v in(max) + v d ) ? v d where: v in(max) is the maximum input voltage. f sw(max ) is the maximum switching frequency for the worst case. t min-on is the minimum controllable on time. v d is the diode forward drop. the upper limit of the output voltage is constrained by the mini- mum controllable off time, which can be as high as 280 ns in adp2302/adp2303 for the worst case. by considering the variation of both the switching frequency and the input voltage, the equation for the upper limit of the output voltage is v out(max) = (1 ? t min-off f sw(max) ) ( v in(min) + v d ) ? v d where: v in(min) is the minimum input voltage. f sw(max) is the maximum switching frequency for the worst case. v d is the diode forward drop. t min-off is the minimum controllable off time. in addition, the bootstrap circuit limits the minimum input voltage for the desired output due to the internal dropout voltage. to attain stable operation at light loads and ensure proper startup for the prebiased condition, the adp2302/adp2303 require the voltage difference between the input voltage and the regulated output voltage (or between the input voltage and the prebias voltage) to be greater than 2.1 v for the worst case. if the voltage difference is smaller, the bootstrap circuit relies on some minimum load current to charge the boost capacitor for startup. figure 46 shows the typical required minimum input voltage vs. load current for the 3.3 v output voltage. 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 1 10 100 1000 v in (v) ouptut current (ma) for start up while in operation 08833-146 figure 46. minimum input voltage vs. load current based on three conversion limitations (the minimum on time, the minimum off time, and the bootstrap dropout voltage), figure 47 shows the voltage conversion limitations.
data sheet adp2302/adp2303 rev. a | page 17 of 28 2 4 6 8 10 12 14 16 18 20 22 0246810121416 v in (v) v out (v) 08833-147 maximum input voltage minimum input voltage figure 47. voltage conversion limitations low input voltage considerations for low input voltage between 3 v and 5 v, the internal boot regulator cannot provide enough bootstrap voltage due to the internal dropout voltage. as a result, the increased mosfet r ds(on) reduces the available load current. to prevent this, add an external small-signal schottky diode from a 5.0 v external bootstrap bias voltage. because the absolute maximum rating between the bst and sw pins is 6.0 v, the bias voltage should be less than 5.5 v. figure 48 shows the application diagram for the external bootstrap circuit. vin 3 .0v ~ 5.0 v adp2302/ adp2303 en gnd o ff on bst sw schottky diode 5v bias voltage fb 08833-046 figure 48. external bootstrap circuit for low input voltage application programming the precision enable generally, the en pin can connect to the vin pin so that the device automatically starts up when the input power is applied. however, the precision enabling feature allows the adp2302/ adp2303 to be used as a programmable uvlo by connecting a resistive voltage divider to vin, as shown in figure 49. this configuration prevents the start-up problems that can occur when vin ramps up slowly in soft start with a relatively high load current. vin v in r en1 r en2 adp2302/ adp2303 en 0 8833-047 figure 49. precision enable used as a programmable uvlo the precision enable feature also allows the adp2302/adp2303 to be sequenced precisely by using a resistive voltage divider from another dc-to-dc power supply, as shown in figure 50. r en1 r en2 adp2302/ adp2303 en another dc/dc supplier 0 8833-048 figure 50. precision enable used as a sequencing control from another dc-to-dc power supply with a 1.2 a pull-down current on the en pin, the equation for the start-up voltage in figure 49 and figure 50 is v2.1 a2.1 v2.1 ?? ? ? ? ? ? ? ? ? ?? where: v startup is the start-up voltage to enable the chip. r en1 is the resistor from the dc source to en. r en2 is the resistor from en to gnd. inductor the high switching frequency of the adp2302/adp2303 allows the use of small inductors. for best performance, use inductor values between 1 h and 15 h. the peak-to-peak inductor ripple current is calculated using the following equation: ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ) ( where: f sw is the switching frequency. l is the inductor value. v d is the diode forward drop. v in is the input voltage. v out is the output voltage. inductors of smaller values are usually smaller in size but increase the ripple current and the output ripple voltage. as a guideline, the inductor peak-to-peak ripple current is typically set to 30% of the maximum load current for optimal transient
adp2302/adp2303 data sheet rev. a | page 18 of 28 response and efficiency. therefore, the inductor value is calculated using the following equation: ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? din d out sw load out in vv vv f i vv l (max) 3.0 where i load(max) is the maximum load current. the inductor peak current is calculated using the following equation: 2 (max) ripple load peak i ii ? ? ? the minimum current rating of the inductor must be greater than the inductor peak current. for ferrite core inductors with a quick saturation characteristic, the inductor saturation current rating should be higher than the switch current limit threshold to prevent the inductor from reaching its saturation point. be sure to validate the worst-case condition, in which there is a shorted output, over the intended temperature range. inductor conduction loss is caused by the flow of current through internal dc resistance (dcr). larger sized inductors have smaller dcr of the inductor and, therefore, may reduce inductor conduction losses. inductor core loss is related to the core material and the ac flux swing, which are affected by the peak-to-peak inductor ripple current. because the adp2302/ adp2303 are high frequency switching regulators, shielded fer- rite core materials are recommended for their low core losses and low emi. some recommended inductors are shown in table 8. catch diode the catch diode conducts the inductor current during the off time of the internal mosfet. the average current of the diode in normal operation is, therefore, dependent on the duty cycle of the regulator as well as the output load current. (max) )( 1 load din d out avg diode i vv vv i ? ? ? ? ? ? ? ? ? ? ? ?? where v d is the diode forward drop. the only reason to select a diode with a higher current rating than necessary in normal operation is for the worst-case condi- tion, in which there is a shorted output. in this case, the diode current increases up to the typical peak current limit threshold. be sure to consult the diode data sheet to ensure that the diode can operate well within the thermal and electrical limits. the reverse breakdown voltage rating of the diode must be higher than the highest input voltage and allow an appropriate margin for the ringing that may be present on the sw node. a schottky diode is recommended for the best efficiency because it has a low forward voltage drop and fast switching speed. table 7 provides a list of recommended schottky diodes. table 7. recommended schottky diodes vendor part no. v rrm (v) i avg (a) vishay ssb43l 30 4 ssa33l 30 3 on semiconductor mbrs330t3 30 3 diodes inc. b330b 30 3 table 8. recommended inductors vendor value (h) part no. dcr (m) i sat (a) dimensions l w h (mm) sumida 2.5 cdrh104rnp-2r5n 7.8 7.5 10.5 10.3 3.8 3.8 cdrh104rnp-3r8n 9.6 6 10.5 10.3 3.8 5.2 cdrh104rnp-5r2n 16 5.5 10.5 10.3 3.8 7 cdrh104rnp-7r0n 20 4.8 10.5 10.3 3.8 10 cdrh104rnp-100n 26 4.4 10.5 10.3 3.8 coilcraft 2.5 mss1038-252nl 10 7.62 10 10.2 3.8 3.8 mss1038-382nl 13 6.5 10 10.2 3.8 5.2 mss1038-522nl 22 5.28 10 10.2 3.8 7 mss1038-702nl 27 4.74 10 10.2 3.8 10 mss1038103nl 35 3.9 10 10.2 3.8 toko 2.8 #919as-2r8m 10.7 8.3 10.3 10.3 4.5 3.7 #919as-3r7m 14.2 7 10.3 10.3 4.5 4.7 #919as-4r7m 16.2 6.1 10.3 10.3 4.5 6.4 #919as-6r4m 22.9 5.2 10.3 10.3 4.5 10 #919as-100m 26.5 4.3 10.3 10.3 4.5 tdk 2.2 vlf10040t-2r2n7r1 7.9 8.2 10 9.7 4.0 3.3 vlf10040t-3r3n6r2 10.5 6.7 10 9.7 4.0 4.7 vlf10040t-4r7n5r4 12.7 5.4 10 9.7 4.0 6.8 vlf10040t-6r8n4r5 19.8 4.6 10 9.7 4.0 10 vlf10040t-100m3r8 28 3.8 10 9.7 4.0
data sheet adp2302/adp2303 rev. a | page 19 of 28 input capacitor the input capacitor must be able to support the maximum input operating voltage and the maximum rms input current. the rms ripple current flowing through the input capacitor is, at maximum, i load(max) /2. select an input capacitor capable of withstanding the rms ripple current for an applications maxi- mum load current using the following equation: ?? dd ii load rmsin ??? ? 1 (max) )( where d is the duty cycle and is equal to din d out vv vv d ? ? ? the recommended input capacitance is ceramic with x5r or x7r dielectrics due to its low esr and small temperature coefficients. a capacitance of 10 f should be adequate for most applications. to minimize supply noise, place the input capacitor as close as possible to the vin pin of the adp2302/adp2303. output capacitor the output capacitor selection affects both the output voltage ripple and the loop dynamics of the regulator. the adp2302/adp2303 are designed to operate with small ceramic capacitors that have low esr and equivalent series inductance (esl) and are, therefore, easily able to meet stringent output voltage ripple specifications. when the regulator operates in continuous conduction mode, the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor equivalent series resistance (esr) plus the voltage ripple caused by the charging and discharging of the output capacitor ? ? ? ? ? ? ? ? ? ?? ???? out c out sw ripple ripple esr cf iv 8 1 capacitors with lower esr are preferable to guarantee low output voltage ripple, as shown in the following equation: ripple ripple cout i v esr ? ? ? ceramic capacitors are manufactured with a variety of dielec- trics, each with different behavior over temperature and applied voltage. x5r or x7r dielectrics are recommended for best performance, due to their low esr and small temperature coefficients. y5v and z5u dielectrics are not recommended because of their poor temperature and dc bias characteristics. in general, most applications require a minimum output capacitor value of 2 22 f. some recommended output capacitors for v out 5.0 v are provided in table 9. thermal consideration adp2302/adp2303 have an internal high-side mosfet and its drive circuit. only a small amount of power dissipates inside the adp2302/adp2303 package under typical load conditions, which reduces thermal constraints. however, in applications with maximum loads at high ambient temperature and high duty cycle, the heat dissipated in the package may cause the junction temperature of the die to exceed the maximum junction temperature of 125c. if the junction temperature exceeds 150c, the regulator goes into thermal shutdown and recovers when the junction temperature drops below 135c. the junction temperature of the die is the sum of the ambient temperature and the temperature rise of the package due to power dissipation, as indicated in the following equation: t j = t a + t r where: t j is the junction temperature. t a is the ambient temperature. t r is the rising temperature of the package due to power dissipation. the rising temperature of the package is directly proportional to the power dissipation in the package. the proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: t r = ja p d where: t r is the rising temperature of the package. ja is the thermal resistance from the junction of the die to the ambient temperature of the package. p d is the power dissipation in the package. table 9. recommended capacitors for v out 5.0 v vendor value part no. dimensions l w h (mm) murata 22 f, 6.3 v, x5r grm31cr60j226ke19 3.2 2.5 2.0 47 f, 6.3 v, x5r grm32er60j476me20 3.2 2.5 2.0 tdk 22 f, 6.3 v, x5r c3216x5r0j226mb 3.2 1.6 0.85 33 f, 6.3 v, x5r c3216x5r0j336mb 3.2 1.6 1.3 47 f, 6.3 v, x5r c3225x5r0j476mb 3.2 2.5 2.5
adp2302/adp2303 data sheet rev. a | page 20 of 28 design example this section provides the procedures to select the external compo- nents, based on the example specifications listed in table 10. the schematic for this design example is shown in figure 51. because the output current is 3 a, the adp2303 is chosen for this application. table 10. step-down dc-to-dc regulator requirements parameter specification additional requirements input voltage, v in 12.0 v 10% none output voltage, v out 3.3 v, 3 a, 1% v out ripple at full load condition none programmable uvlo voltage v in start-up voltage approximately 7.8 v none pgood not used none catch diode selection select the catch diode. a schottky diode is recommended for best efficiency because it has a low forward voltage drop and faster switching speed. the average current of the catch diode in normal operation, with a typical schottky diode forward voltage, can be calculated using the following equation: (max) )( 1 load din d out avg diode i vv vv i ? ? ? ? ? ? ? ? ? ? ? ?? where: v out = 3.3 v. v in = 12 v. i load(max) = 3 a. v d = 0.4 v. therefore, i diode(avg) = 2.1 a. in this case, selecting a ssb43l, 4.0 a, 30 v surface-mount schottky diode results in more reliable operation. inductor selection select the inductor by using the following equation: ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (max) 3.0 where: v out = 3.3 v. v in = 12 v. i load(max) = 3 a. v d = 0.4 v. f sw = 700 khz. this results in l = 4.12 h. the closest standard value is 4.7 h; therefore, i ripple = 0.7 a. the inductor peak current is calculated using the following equation: 2 (max) ripple load pea i ii ? ? ? where: i load(max) = 3 a. i ripple = 0.7 a. the calculated peak current for the inductor is 3.4 a. therefore, in this application, select vlf10040t-4r7n5r4 as the inductor. output capacitor selection select the output capacitor based on the minimum output voltage ripple requirement, according to the following equation: ? ? ? ? ? ? ? ? ? ?? ???? 8 1 where: i ripple = 0.7 a. f sw = 700 khz. v ripple = 33 mv (1% of output voltage). if esr of the ceramic capacitor is 3 m, then c out = 4 f. because the output capacitor is one of two external components that control the loop stability and according to the recommended external components in table 11, choose two 47 f capacitor with a 6.3 v voltage rating in this application. resistive voltage divider selection the output feedback resistive voltage divider is ? ? ? ? ? ? ? ? ??? 1v800.0 for the 3.3 v output voltage, choose r top = 31.6 k and r bot = 10.2 k as the feedback resistive voltage divider according to the recommended values in table 11. the resistive voltage divider for the programmable v in start-up voltage is v2.1 a2.1 v2.1 ?? ? ? ? ? ? ? ? ? ?? if v startup = 7.8 v, choose r en2 = 10.2 k, and then calculate r en1 , which, in this case, is 56 k.
data sheet adp2302/adp2303 rev. a | page 21 of 28 vin v out = 3.3v 3a adp2303 pgood en bst sw fb r en1 56k ? 1% c in 10f 25v c bst 0.1f d ssb43l c out1 47f 6.3v c out2 47f 6.3v r top 31.6k ? 1% r bot 10.2k ? 1% l 4.7h r en2 10.2k ? 1% r pgood 100k ? gnd 0 8833-049 v in = 12v figure 51. schematic for the design example table 11. recommended external components for typical applications at 2 a/3 a output load part umber v i v v out v i loadmax a l c out r top k 1 r bot k 1 adp2302 18 3.3 2 6.8 2 22 f 31.6 10.2 18 5.0 2 10 2 22 f 52.3 10 12 1.5 2 4.7 2 47 f 10 11.3 12 1.8 2 4.7 3 22 f 12.7 10.2 12 2.5 2 4.7 3 22 f 21.5 10.2 12 3.3 2 6.8 2 22 f 31.6 10.2 12 5.0 2 6.8 2 22 f 52.3 10 5 1.5 2 3.3 2 47 f 10 11.3 5 1.8 2 3.3 2 47 f 12.7 10.2 5 2.5 2 3.3 2 22 f 21.5 10.2 adp2303 18 3.3 3 4.7 2 47 f 31.6 10.2 18 5.0 3 6.8 47 f 52.3 10 12 1.5 3 2.5 3 47 f 10 11.3 12 1.8 3 3.3 3 47 f 12.7 10.2 12 2.5 3 3.3 2 47 f 21.5 10.2 12 3.3 3 4.7 2 47 f 31.6 10.2 12 5.0 3 4.7 47 f 52.3 10 5 1.5 3 2.2 3 47 f 10 11.3 5 1.8 3 2.2 3 47 f 12.7 10.2 5 2.5 3 2.2 3 47 f 21.5 10.2
adp2302/adp2303 data sheet rev. a | page 22 of 28 circuit board layout recommendations good circuit board layout is essential to obtaining the best performance for adp2302/adp2303. poor layout can affect the regulation and stability, as well as the electromagnetic interface (emi) and electromagnetic compatibility (emc) performance. a pcb layout example is shown in figure 53. refer to the following guidelines for a good pcb layout: ? place the input capacitor, the inductor, catch diode, output capacitor, and bootstrap capacitor close to the ic using short traces. ? ensure that the high current loop traces are as short and wide as possible. the high current path is shown figure 52. ? maximize the size of ground metal on the component side to improve thermal dissipation. ? use a ground plane with several vias connecting to the component side ground to further reduce noise on sensitive circuit nodes. ? minimize the length of the fb trace connecting the top of the feedback resistive voltage divider to the output. in addition, keep these traces away from the high current traces and the switch node to avoid noise pickup. vin adp2302/ adp2303 en gnd bst sw pgood fb 08833-050 figure 52. typical application circuit wi th high current lines shown in blue bst 1 2 3 4 8 7 6 5 exposed pad vin en pgood sw gnd nc fb bst cap diode inductor input capacitor output capacitors v in v out gnd 08833-051 figure 53. recommended layout for adp2302/adp2303
data sheet adp2302/adp2303 rev. a | page 23 of 28 typical application circuits vin v in = 12v v out = 1.5v 2a adp2302ardz pgood en bst sw fb c in 10f 25v c bst 0.1f d b330b c out1 47f 6.3v c out2 47f 6.3v r top 10k ? 1% r bot 11.3k ? 1% l 4.7h r pgood 100k ? gnd 0 8833-052 figure 54. adp2302 typical application, v in = 12 v, v out = 1.5 v, 2 a vin v in = 12v v out = 1.8v 2a adp2302ardz pgood en bst sw fb c in 10f 25v c bst 0.1f d b330b c out1 22f 6.3v c out2 22f 6.3v c out3 22f 6.3v r top 12.7k ? 1% r bot 10.2k ? 1% l 4.7h r pgood 100k ? gnd 0 8833-053 figure 55. adp2302 typical application, v in = 12 v, v out = 1.8 v, 2 a vin v in = 12 v v out = 2.5v 2a adp2302ardz-2.5 pgood en bst sw fb c in 10f 25v c bst 0.1f d b330b c out1 22f 6.3v c out2 22f 6.3v c out3 22f 6.3v l 4.7h gnd 0 8833-054 figure 56. adp2302 typical application, v in = 12 v, v out = 2.5 v, 2 a v out = 3.3v 2a adp2302ardz-3.3 bst sw fb c bst 0.1f d b330b c out1 22f 6.3v c out2 22f 6.3v l 6.8h gnd vin v in pgood en r en1 56k ? 1% c in 10f 25v r en2 10.2k ? 1% r pgood 100k ? 08833-055 figure 57. adp2302 typical application, v in = 12 v, v out = 3.3 v, 2 a, with programmable 7.8 v uvlo
adp2302/adp2303 data sheet rev. a | page 24 of 28 v out = 5.0v 2a adp2302ardz-5.0 bst sw fb c bst 0.1f d b330b c out1 22f 16v c out2 22f 16v l 6.8h gnd vin pgood en v in = 12 v c in 10f 25v r pgood 100k ? 08833-056 figure 58. adp2302 typical application, v in = 12 v, v out = 5 v, 2 a v out = 1.5v 3a ADP2303ARDZ bst sw fb c bst 0.1f d ssb43l c out1 47f 6.3v c out2 47f 6.3v l 2.5h gnd vin pgood en v in = 12 v c in 10f 25v r pgood 100k ? c out3 47f 6.3v r top 10k ? 1% r bot 11.3k ? 1% 08833-057 figure 59. adp2303 typical application, v in = 12 v, v out = 1.5 v, 3 a v out = 1.8v 3a ADP2303ARDZ bst sw fb c bst 0.1f d ssb43l c out1 47f 6.3v c out2 47f 6.3v l 3.3h gnd vin pgood en v in = 12v c in 10f 25v r pgood 100k ? r top 12.7k ? 1% r bot 10.2k ? 1% 08833-058 c out3 47f 6.3v figure 60. adp2303 typical application, v in = 12 v, v out = 1.8 v, 3 a v out = 2.5v 3a ADP2303ARDZ bst sw fb c bst 0.1f d ssb43l c out1 47f 6.3v c out2 47f 6.3v l 3.3h gnd vin pgood en v in = 12v c in 10f 25v r pgood 100k ? r top 21.5k ? 1% r bot 10.2k ? 1% 08833-059 figure 61. adp2303 typical application, v in = 12 v, v out = 2.5 v, 3 a
data sheet adp2302/adp2303 rev. a | page 25 of 28 v out = 5v 3a ADP2303ARDZ-5.0 bst sw fb c bst 0.1f d ssb43l c out1 47f 6.3v l 4.7h gnd vin pgood en v in = 12 v c in 10f 25v r pgood 100k ? 08833-060 figure 62. adp2303 typical application, v in = 12 v, v out = 5 v, 3 a vin v in = 5v v out = 1.2v 2a adp2302ardz pgood en bst sw fb c in 10f 25v c bst 0.1f d b330b c out1 47f 6.3v c out2 47f 6.3v r top 10k ? 1% r bot 20k ? 1% l 3.3h r pgood 100k ? gnd 0 8833-061 figure 63. adp2302 typical application, v in = 5v, v out = 1.2 v, 2 a
adp2302/adp2303 data sheet rev. a | page 26 of 28 outline dimensions compliant to jedec standards ms-012-a a 06-02-2011-b 1.27 0.40 1.75 1.35 2.29 2.29 0.356 0.457 4.00 3.90 3.80 6.20 6.00 5.80 5.00 4.90 4.80 0.10 max 0.05 nom 3.81 ref 0.25 0.17 8 0 0.50 0.25 45 coplanarity 0.10 1.04 ref 8 1 4 5 1.27 bsc s eating plane for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. bottom view top view 0.51 0.31 1.65 1.25 figure 64. 8-lead standard small outlin e package, with exposed pad [soic_n_ep] narrow body (rd-8-1) dimensions shown in millimeters ordering guide model 1 output voltage temperature range package description package option adp2302ardz adjustable ?40c to + 125c 8-lead soic_n_ep, tube rd-8-1 adp2302ardz-2.5 2.5 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 adp2302ardz-3.3 3.3 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 adp2302ardz-5.0 5.0 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 adp2302ardz-r7 adjustable ?40c to +125c 8- lead soic_n_ep, 7 tape and reel rd-8-1 adp2302ardz-2.5-r7 2.5 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 adp2302ardz-3.3-r7 3.3 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 adp2302ardz-5.0-r7 5.0 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 adp2302-evalz evaluation board ADP2303ARDZ adjustable ?40c to +125 c 8-lead soic_n_ep, tube rd-8-1 ADP2303ARDZ-2.5 2.5 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 ADP2303ARDZ-3.3 3.3 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 ADP2303ARDZ-5.0 5.0 v ?40c to +125c 8-lead soic_n_ep, tube rd-8-1 ADP2303ARDZ-r7 adjustable ?40c to +125c 8- lead soic_n_ep, 7 tape and reel rd-8-1 ADP2303ARDZ-2.5-r7 2.5 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 ADP2303ARDZ-3.3-r7 3.3 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 ADP2303ARDZ-5.0-r7 5.0 v ?40c to +125c 8-lead soic_n_ep, 7 tape and reel rd-8-1 adp2303-evalz evaluation board 1 z = rohs compliant part.
data sheet adp2302/adp2303 rev. a | page 27 of 28 notes
adp2302/adp2303 data sheet rev. a | page 28 of 28 notes ? 2010 C 2012 analog devices, inc. all rights reserved. trademarks and registered tradema rks are the property of their respective owners. d08833 - 0- 6/12(a)

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